123 lines
3.9 KiB
C
123 lines
3.9 KiB
C
// Public NTLite pci ABI declarations shared between kernel, drivers, and user mode.
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#pragma once
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// pci.h - PCI bus driver DDI exported by pci.sys
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// Function drivers must not enumerate PCI or decode BARs themselves. They bind
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// to PCI PDOs through the I/O manager and use these routines to access the PCI
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// function represented by their PDO.
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#include <stdint.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include <ntlite/status.h>
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#include <ntlite/ddi/io_driver.h>
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#ifndef PCI_API
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# ifdef PCI_SYS_BUILD
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# define PCI_API __declspec(dllexport)
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# else
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# define PCI_API __declspec(dllimport)
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# endif
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#endif
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typedef struct PCI_ADDRESS {
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uint16_t Segment;
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uint8_t Bus;
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uint8_t Device;
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uint8_t Function;
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} PCI_ADDRESS;
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typedef struct PCI_DEVICE_INFO {
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PCI_ADDRESS Address;
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uint16_t VendorId;
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uint16_t DeviceId;
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uint16_t SubsystemVendorId;
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uint16_t SubsystemId;
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uint8_t RevisionId;
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uint8_t ProgIf;
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uint8_t Subclass;
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uint8_t ClassCode;
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uint8_t HeaderType;
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uint8_t InterruptLine;
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uint8_t InterruptPin;
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} PCI_DEVICE_INFO;
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typedef enum PCI_BAR_TYPE {
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PciBarUnused = 0,
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PciBarIo,
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PciBarMemory32,
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PciBarMemory64,
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} PCI_BAR_TYPE;
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typedef struct PCI_BAR {
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PCI_BAR_TYPE Type;
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uint8_t Index;
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uint64_t Base;
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uint64_t Length;
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bool Prefetchable;
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} PCI_BAR;
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#define PCI_ENABLE_IO 0x00000001u
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#define PCI_ENABLE_MEMORY 0x00000002u
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#define PCI_ENABLE_BUSMASTER 0x00000004u
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#define PCI_ENABLE_INTX 0x00000008u
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#define PCI_DISABLE_INTX 0x00000010u
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#define PCI_CONFIG_VENDOR_DEVICE 0x00u
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#define PCI_CONFIG_COMMAND_STATUS 0x04u
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#define PCI_CONFIG_REVISION_CLASS 0x08u
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#define PCI_CONFIG_HEADER_TYPE 0x0Cu
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#define PCI_CONFIG_BAR0 0x10u
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#define PCI_CONFIG_INTERRUPT_LINE_PIN 0x3Cu
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PCI_API uint32_t PciDriverAbiVersion(void);
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PCI_API KSTATUS PciGetDeviceInfo(DEVICE_OBJECT* pdo,
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PCI_DEVICE_INFO* outInfo);
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PCI_API KSTATUS PciReadConfig8(DEVICE_OBJECT* pdo,
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uint16_t offset,
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uint8_t* outValue);
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PCI_API KSTATUS PciReadConfig16(DEVICE_OBJECT* pdo,
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uint16_t offset,
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uint16_t* outValue);
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PCI_API KSTATUS PciReadConfig32(DEVICE_OBJECT* pdo,
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uint16_t offset,
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uint32_t* outValue);
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PCI_API KSTATUS PciWriteConfig8(DEVICE_OBJECT* pdo,
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uint16_t offset,
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uint8_t value);
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PCI_API KSTATUS PciWriteConfig16(DEVICE_OBJECT* pdo,
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uint16_t offset,
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uint16_t value);
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PCI_API KSTATUS PciWriteConfig32(DEVICE_OBJECT* pdo,
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uint16_t offset,
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uint32_t value);
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PCI_API KSTATUS PciGetBar(DEVICE_OBJECT* pdo,
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uint8_t index,
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PCI_BAR* outBar);
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PCI_API KSTATUS PciMapBar(DEVICE_OBJECT* pdo,
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uint8_t index,
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uint64_t pageFlags,
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void** outVirtual,
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uint64_t* outLength);
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PCI_API KSTATUS PciEnableDevice(DEVICE_OBJECT* pdo,
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uint32_t flags);
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PCI_API KSTATUS PciGetInterrupt(DEVICE_OBJECT* pdo,
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uint8_t* outIrq);
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PCI_API KSTATUS PciEnableMsi(DEVICE_OBJECT* pdo,
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uint8_t irqSlot);
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PCI_API KSTATUS PciEnableMsiAuto(DEVICE_OBJECT* pdo,
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uint8_t* outIrqSlot);
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