127 lines
3.8 KiB
C
127 lines
3.8 KiB
C
// rtl816x_pci.c - PCI BAR/MMIO front-end for rtl816x.
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#include "rtl816x.h"
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bool RtlFindDevice(uint8_t* outBus, uint8_t* outDev, uint8_t* outFn, uint16_t* outDeviceId) {
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if (gHal->Pci.FindDevice(RTL_VENDOR_REALTEK, RTL_DEVICE_8168, outBus, outDev, outFn)) {
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*outDeviceId = RTL_DEVICE_8168;
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return true;
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}
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if (gHal->Pci.FindDevice(RTL_VENDOR_REALTEK, RTL_DEVICE_8169, outBus, outDev, outFn)) {
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*outDeviceId = RTL_DEVICE_8169;
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return true;
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}
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return false;
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}
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bool RtlReadBar(uint8_t bus, uint8_t dev, uint8_t fn, uint8_t index, RTL_BAR* out) {
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uint8_t reg = (uint8_t)(PCI_REG_BAR0 + index * 4u);
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uint32_t lo = gHal->Pci.Read32(bus, dev, fn, reg);
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out->Kind = RtlBarNone;
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out->Base = 0;
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out->Index = index;
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if (lo == 0 || lo == 0xFFFFFFFFu)
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return false;
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if (lo & 1u) {
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uint32_t base = lo & ~0x3u;
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if (!base) return false;
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out->Kind = RtlBarIo;
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out->Base = base;
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return true;
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}
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uint64_t base = (uint64_t)(lo & ~0xFu);
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uint32_t type = (lo >> 1) & 0x3u;
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if (type == 0x2u && index < 5) {
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uint32_t hi = gHal->Pci.Read32(bus, dev, fn, (uint8_t)(reg + 4u));
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base |= ((uint64_t)hi << 32);
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}
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if (!base) return false;
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out->Kind = RtlBarMmio;
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out->Base = base;
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return true;
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}
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KSTATUS RtlMapMmio(uint64_t physBase, volatile uint8_t** outMmio) {
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uint64_t pageBase = physBase & PAGE_MASK;
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uint64_t pageOff = physBase - pageBase;
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for (uint32_t i = 0; i < RTL_MMIO_PAGES; i++) {
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PHYSICAL_ADDRESS phys = pageBase + (uint64_t)i * PAGE_SIZE;
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uintptr_t virt = (uintptr_t)gHal->PhysToVirt(phys);
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KSTATUS st = MmMapPage(virt, phys, PAGE_PRESENT | PAGE_WRITE | PAGE_NOCACHE);
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if (st == STATUS_ALREADY_EXISTS)
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st = MmSetPageProtect(virt, PAGE_SIZE, PAGE_PRESENT | PAGE_WRITE | PAGE_NOCACHE);
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if (!KSUCCESS(st))
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return st;
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}
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*outMmio = (volatile uint8_t*)((uintptr_t)gHal->PhysToVirt(pageBase) + pageOff);
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return STATUS_SUCCESS;
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}
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KSTATUS RtlSelectRegisterBar(RTL816X_DEVICE* r) {
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RTL_BAR best = { RtlBarNone, 0, 0 };
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RTL_BAR fallback = { RtlBarNone, 0, 0 };
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for (uint8_t i = 0; i < 6; i++) {
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RTL_BAR bar;
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if (!RtlReadBar(r->Bus, r->Dev, r->Fn, i, &bar))
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continue;
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if (bar.Kind == RtlBarMmio) {
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best = bar;
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break;
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}
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if (bar.Kind == RtlBarIo && fallback.Kind == RtlBarNone)
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fallback = bar;
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// Skip the high dword of 64-bit memory BARs.
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if (bar.Kind == RtlBarMmio) {
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uint32_t lo = gHal->Pci.Read32(r->Bus, r->Dev, r->Fn, (uint8_t)(PCI_REG_BAR0 + i * 4u));
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if (((lo >> 1) & 0x3u) == 0x2u)
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i++;
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}
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}
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if (best.Kind == RtlBarNone)
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best = fallback;
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if (best.Kind == RtlBarMmio) {
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KSTATUS st = RtlMapMmio(best.Base, &r->Mmio);
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if (!KSUCCESS(st))
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return st;
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r->UseMmio = true;
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DbgPrint("RTL816X: BAR%u MMIO base=0x%016llX virt=0x%016llX\n",
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best.Index, (unsigned long long)best.Base, r->Mmio);
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return STATUS_SUCCESS;
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}
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if (best.Kind == RtlBarIo) {
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if (best.Base > 0xFFFFu)
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return STATUS_NOT_SUPPORTED;
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r->IoBase = (uint16_t)best.Base;
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r->UseMmio = false;
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DbgPrint("RTL816X: BAR%u I/O base=0x%04x\n", best.Index, r->IoBase);
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return STATUS_SUCCESS;
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}
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return STATUS_NOT_FOUND;
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}
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void RtlEnablePci(RTL816X_DEVICE* r) {
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uint32_t cmd = gHal->Pci.Read32(r->Bus, r->Dev, r->Fn, PCI_REG_COMMAND);
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cmd |= PCI_COMMAND_MASTER;
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if (r->UseMmio) cmd |= PCI_COMMAND_MEMORY;
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else cmd |= PCI_COMMAND_IO;
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cmd &= ~PCI_COMMAND_INTX_DISABLE;
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gHal->Pci.Write32(r->Bus, r->Dev, r->Fn, PCI_REG_COMMAND, cmd);
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}
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