// Realtek RTL816x driver internals shared by the PCI and packet paths. #pragma once #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define RTL_VENDOR_REALTEK 0x10ECu #define RTL_DEVICE_8168 0x8168u #define RTL_DEVICE_8169 0x8169u #define RTL816X_DEVICE_MAGIC 0x81690001u #define RTL816X_MAX_DEVICES 8u #define RTL_REG_MAC0 0x00u #define RTL_REG_MAR0 0x08u #define RTL_REG_TNPDS_LO 0x20u #define RTL_REG_TNPDS_HI 0x24u #define RTL_REG_THPDS_LO 0x28u #define RTL_REG_THPDS_HI 0x2Cu #define RTL_REG_CHIP_CMD 0x37u #define RTL_REG_TX_POLL 0x38u #define RTL_REG_INTR_MASK 0x3Cu #define RTL_REG_INTR_STAT 0x3Eu #define RTL_REG_TX_CONFIG 0x40u #define RTL_REG_RX_CONFIG 0x44u #define RTL_REG_CFG9346 0x50u #define RTL_REG_CONFIG1 0x52u #define RTL_REG_PHY_STATUS 0x6Cu #define RTL_REG_RX_MAXSIZE 0xDAu #define RTL_REG_CPLUS_CMD 0xE0u #define RTL_REG_RDSAR_LO 0xE4u #define RTL_REG_RDSAR_HI 0xE8u #define RTL_CMD_RESET 0x10u #define RTL_CMD_RX_ENABLE 0x08u #define RTL_CMD_TX_ENABLE 0x04u #define RTL_TXPOLL_NPQ 0x40u #define RTL_ISR_ROK 0x0001u #define RTL_ISR_RER 0x0002u #define RTL_ISR_TOK 0x0004u #define RTL_ISR_TER 0x0008u #define RTL_ISR_RXOVW 0x0010u #define RTL_ISR_LINKCHG 0x0020u #define RTL_ISR_FOVW 0x0040u #define RTL_ISR_TDU 0x0080u #define RTL_ISR_SWINT 0x0100u #define RTL_ISR_TIMEOUT 0x4000u #define RTL_ISR_SYSERR 0x8000u #define RTL_INTR_ENABLES (RTL_ISR_ROK | RTL_ISR_RER | RTL_ISR_TOK | RTL_ISR_TER | \ RTL_ISR_RXOVW | RTL_ISR_LINKCHG | RTL_ISR_FOVW | \ RTL_ISR_TDU | RTL_ISR_SYSERR) #define RTL_RXCFG_AAP (1u << 0) // accept all physical packets/promiscuous #define RTL_RXCFG_APM (1u << 1) // accept physical match #define RTL_RXCFG_AM (1u << 2) // accept multicast #define RTL_RXCFG_AB (1u << 3) // accept broadcast #define RTL_RXCFG_AR (1u << 4) // accept runt #define RTL_RXCFG_AER (1u << 5) // accept errored #define RTL_RXCFG_DMA_UNLIMITED (7u << 8) #define RTL_TXCFG_DMA_UNLIMITED (7u << 8) #define RTL_TXCFG_IFG (3u << 24) #define RTL_DESC_OWN (1u << 31) #define RTL_DESC_EOR (1u << 30) #define RTL_DESC_FS (1u << 29) #define RTL_DESC_LS (1u << 28) #define RTL_RXDESC_RES (1u << 21) #define RTL_RXDESC_RWT (1u << 22) #define RTL_RXDESC_CRC (1u << 19) #define RTL_RXDESC_RUNT (1u << 20) #define RTL_DESC_LENGTH_MASK 0x00003FFFu #define RTL_RX_COUNT 64u #define RTL_TX_COUNT 64u #define RTL_BUF_SIZE 2048u #define RTL_RX_WIRE_MAX (NET_ETHERNET_MAX_FRAME + 4u) #define RTL_RING_PAGES 1u #define RTL_RXBUF_PAGES ((RTL_RX_COUNT * RTL_BUF_SIZE + 4095u) / 4096u) #define RTL_TXBUF_PAGES ((RTL_TX_COUNT * RTL_BUF_SIZE + 4095u) / 4096u) #pragma pack(push, 1) typedef struct RTL_DESC { volatile uint32_t opts1; volatile uint32_t opts2; volatile uint32_t addrLo; volatile uint32_t addrHi; } RTL_DESC; #pragma pack(pop) typedef struct RTL816X_DEVICE { uint32_t Magic; DEVICE_OBJECT* Fdo; DEVICE_OBJECT* Pdo; DEVICE_OBJECT* LowerDevice; PCI_DEVICE_INFO PciInfo; PCI_BAR RegisterBar; uint64_t RegisterBytes; uint8_t Irq; bool Started; bool Removed; bool SurpriseRemoved; bool UseMmio; volatile uint8_t* Mmio; uint16_t IoBase; RTL_DESC* RxRing; RTL_DESC* TxRing; PHYSICAL_ADDRESS RxRingPhys; PHYSICAL_ADDRESS TxRingPhys; uint8_t* RxBuffers; uint8_t* TxBuffers; PHYSICAL_ADDRESS RxBuffersPhys; PHYSICAL_ADDRESS TxBuffersPhys; uint32_t RxIndex; uint32_t TxIndex; SPINLOCK TxLock; KDPC Dpc; volatile uint16_t PendingIsr; NET_DEVICE NetDevice; } RTL816X_DEVICE; extern const HAL_API* gHal; KSTATUS Rtl816xAddDevice(DRIVER_OBJECT* driver, DEVICE_OBJECT* physicalDeviceObject); KSTATUS Rtl816xDispatchPnp(DEVICE_OBJECT* device, IRP* irp);