// Realtek RTL8139 driver internals shared by the PCI and packet paths. #pragma once #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define RTL8139_VENDOR_REALTEK 0x10ECu #define RTL8139_DEVICE_ID 0x8139u #define RTL8139_DEVICE_MAGIC 0x81390001u #define RTL8139_REG_IDR0 0x00u #define RTL8139_REG_MAR0 0x08u #define RTL8139_REG_TSD0 0x10u #define RTL8139_REG_TSAD0 0x20u #define RTL8139_REG_RBSTART 0x30u #define RTL8139_REG_CMD 0x37u #define RTL8139_REG_CAPR 0x38u #define RTL8139_REG_CBR 0x3Au #define RTL8139_REG_IMR 0x3Cu #define RTL8139_REG_ISR 0x3Eu #define RTL8139_REG_TCR 0x40u #define RTL8139_REG_RCR 0x44u #define RTL8139_REG_CONFIG1 0x52u #define RTL8139_CMD_BUFE 0x01u #define RTL8139_CMD_TE 0x04u #define RTL8139_CMD_RE 0x08u #define RTL8139_CMD_RST 0x10u #define RTL8139_ISR_ROK 0x0001u #define RTL8139_ISR_RER 0x0002u #define RTL8139_ISR_TOK 0x0004u #define RTL8139_ISR_TER 0x0008u #define RTL8139_ISR_RXOVW 0x0010u #define RTL8139_ISR_PUN 0x0020u #define RTL8139_ISR_FOVW 0x0040u #define RTL8139_ISR_LENCHG 0x2000u #define RTL8139_ISR_TIMEOUT 0x4000u #define RTL8139_ISR_SYSERR 0x8000u #define RTL8139_INTR_ENABLES (RTL8139_ISR_ROK | RTL8139_ISR_RER | RTL8139_ISR_TOK | \ RTL8139_ISR_TER | RTL8139_ISR_RXOVW | RTL8139_ISR_PUN | \ RTL8139_ISR_FOVW | RTL8139_ISR_LENCHG | RTL8139_ISR_SYSERR) #define RTL8139_RCR_AAP (1u << 0) #define RTL8139_RCR_APM (1u << 1) #define RTL8139_RCR_AM (1u << 2) #define RTL8139_RCR_AB (1u << 3) #define RTL8139_RCR_AR (1u << 4) #define RTL8139_RCR_AER (1u << 5) #define RTL8139_RCR_WRAP (1u << 7) #define RTL8139_RCR_MXDMA_UNLIMITED (7u << 8) #define RTL8139_RCR_RBLEN_8K (0u << 11) #define RTL8139_TCR_MXDMA_UNLIMITED (7u << 8) #define RTL8139_TCR_IFG_NORMAL (3u << 24) #define RTL8139_TSD_SIZE_MASK 0x00001FFFu #define RTL8139_TSD_OWN (1u << 13) #define RTL8139_TSD_TUN (1u << 14) #define RTL8139_TSD_TOK (1u << 15) #define RTL8139_TSD_TABT (1u << 30) #define RTL8139_RX_OK 0x0001u #define RTL8139_RX_BAD_BITS 0x003Eu // FAE | CRC | LONG | RUNT | ISE; MAR/PAM/BAR are valid match flags. #define RTL8139_TX_SLOTS 4u #define RTL8139_TX_BUF_SIZE 2048u #define RTL8139_RX_RING_SIZE 8192u #define RTL8139_RX_PAD 16u #define RTL8139_RX_GUARD 1500u #define RTL8139_RX_ALLOC_SIZE (RTL8139_RX_RING_SIZE + RTL8139_RX_PAD + RTL8139_RX_GUARD) #define RTL8139_RX_PAGES ((RTL8139_RX_ALLOC_SIZE + 4095u) / 4096u) #define RTL8139_TX_PAGES (((RTL8139_TX_SLOTS * RTL8139_TX_BUF_SIZE) + 4095u) / 4096u) #define RTL8139_RX_WIRE_MAX (NET_ETHERNET_MAX_FRAME + 4u) #define RTL8139_REG_TSD(slot) (RTL8139_REG_TSD0 + ((slot) * 4u)) #define RTL8139_REG_TSAD(slot) (RTL8139_REG_TSAD0 + ((slot) * 4u)) #define RTL8139_MAX_DEVICES 8u typedef struct RTL8139_DEVICE { uint32_t Magic; DEVICE_OBJECT* Fdo; DEVICE_OBJECT* Pdo; DEVICE_OBJECT* LowerDevice; PCI_DEVICE_INFO PciInfo; PCI_BAR RegisterBar; uint64_t RegisterBytes; uint8_t Irq; bool Started; bool Removed; bool SurpriseRemoved; bool UseMmio; volatile uint8_t* Mmio; uint16_t IoBase; PHYSICAL_ADDRESS RxPhys; PHYSICAL_ADDRESS TxPhys; uint8_t* RxBuffer; uint8_t* TxBuffers; uint8_t RxScratch[RTL8139_TX_BUF_SIZE]; uint32_t RxOffset; uint32_t TxSlot; SPINLOCK TxLock; KDPC Dpc; volatile uint16_t PendingIsr; NET_DEVICE NetDevice; } RTL8139_DEVICE; extern const HAL_API* gHal; KSTATUS Rtl8139AddDevice(DRIVER_OBJECT* driver, DEVICE_OBJECT* physicalDeviceObject); KSTATUS Rtl8139DispatchPnp(DEVICE_OBJECT* device, IRP* irp);