parallel compile, SMP, swapgs, cleanup, remove useless Reserved fields
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b17c9ac854
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bfe2b55142
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+84
-12
@@ -40,7 +40,7 @@ typedef struct {
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uint32_t Length;
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uint64_t XsdtAddress;
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uint8_t ExtendedChecksum;
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uint8_t Reserved[3];
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uint8_t Padding[3];
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} RSDP;
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// ACPI SDT Header
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@@ -81,6 +81,7 @@ typedef struct {
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static uintptr_t gLapicPhys = 0xFEE00000;
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static uintptr_t gIoapicPhys = 0xFEC00000;
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static uintptr_t gHpetPhys = 0xFED00000;
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static HAL_CPU_TOPOLOGY gCpuTopology;
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// ACPI power-off state (filled in by ParseFadt / ScanDsdtForS5)
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static uint16_t gPm1aCntBlk = 0;
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@@ -89,7 +90,7 @@ static uint8_t gSlpTypA = 5; // S5 SLP_TYP for PM1a; 5 is correct for QEMU
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static uint8_t gSlpTypB = 5; // S5 SLP_TYP for PM1b
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int debugEnabled = 0;
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int _fltused; // fuckass
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int _fltused; // MSVC floating-point helper anchor
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static void hal_putchar(char c) {
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gApi.Screen.PrintChar(c, 0x00FF00, 0x000000);
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}
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@@ -114,7 +115,7 @@ typedef struct {
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ACPISDTHeader Header; // 0 (36 bytes)
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uint32_t FirmwareCtrl; // 36
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uint32_t Dsdt; // 40 - physical addr of DSDT
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uint8_t Reserved1; // 44
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uint8_t Ignored44; // 44
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uint8_t PreferredPmProfile; // 45
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uint16_t SciInt; // 46
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uint32_t SmiCmd; // 48
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@@ -201,16 +202,51 @@ static void ParseFadt(const FADT* fadt) {
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}
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}
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static void HalAddCpuRecord(uint32_t uid, uint32_t lapicId, uint32_t flags) {
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if (gCpuTopology.CpuCount >= HAL_MAX_CPUS)
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return;
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for (uint32_t i = 0; i < gCpuTopology.CpuCount; i++) {
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if (gCpuTopology.Cpus[i].LapicId == lapicId)
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return;
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}
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HAL_CPU_INFO* cpu = &gCpuTopology.Cpus[gCpuTopology.CpuCount++];
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memset(cpu, 0, sizeof(*cpu));
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cpu->ProcessorUid = uid;
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cpu->LapicId = lapicId;
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cpu->Flags = flags;
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cpu->Enabled = (flags & 1u) ? 1u : 0u;
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}
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static void ParseMadt(MADT* madt) {
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gLapicPhys = madt->LocalAPICAddress;
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uint8_t* p = (uint8_t *)(madt + 1);
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uint8_t* end = (uint8_t *)madt + madt->Header.Length;
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while (p < end) {
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while (p + 2 <= end) {
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uint8_t type = p[0], len = p[1];
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if (type == 1) { // I/O APIC entry
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if (!len || p + len > end) break;
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if (type == 0 && len >= 8) { // Processor Local APIC
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uint32_t uid = p[2];
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uint32_t lapicId = p[3];
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uint32_t flags = *(uint32_t *)(p + 4);
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if (flags & 1u)
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HalAddCpuRecord(uid, lapicId, flags);
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} else if (type == 1 && len >= 12) { // I/O APIC entry
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gIoapicPhys = *(uint32_t *)(p + 4);
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} else if (type == 5 && len >= 12) { // Local APIC Address Override
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gLapicPhys = (uintptr_t)*(uint64_t *)(p + 4);
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} else if (type == 9 && len >= 16) { // Processor Local x2APIC
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uint32_t lapicId = *(uint32_t *)(p + 4);
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uint32_t flags = *(uint32_t *)(p + 8);
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uint32_t uid = *(uint32_t *)(p + 12);
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if ((flags & 1u) && lapicId < 256u)
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HalAddCpuRecord(uid, lapicId, flags);
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}
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p += len ? len : 1;
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p += len;
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}
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}
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@@ -313,6 +349,44 @@ static void HalShutdown(void) {
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while (true) __halt();
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}
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// ---------------------------------------------------------------------------
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__declspec(dllexport) KSTATUS HalGetProcessorTopology(HAL_CPU_TOPOLOGY* out) {
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if (!out) return STATUS_INVALID_PARAMETER;
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memset(out, 0, sizeof(*out));
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*out = gCpuTopology;
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if (!out->CpuCount) {
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out->CpuCount = 1;
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out->BspLapicId = HalGetBspLapicId();
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out->Cpus[0].LapicId = out->BspLapicId;
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out->Cpus[0].ProcessorUid = 0;
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out->Cpus[0].Flags = 1;
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out->Cpus[0].Enabled = 1;
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out->Cpus[0].IsBsp = 1;
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return STATUS_SUCCESS;
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}
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uint32_t bsp = HalGetBspLapicId();
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out->BspLapicId = bsp;
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int foundBsp = 0;
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for (uint32_t i = 0; i < out->CpuCount; i++) {
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out->Cpus[i].IsBsp = (out->Cpus[i].LapicId == bsp) ? 1u : 0u;
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if (out->Cpus[i].IsBsp) foundBsp = 1;
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}
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if (!foundBsp && out->CpuCount < HAL_MAX_CPUS) {
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HAL_CPU_INFO* cpu = &out->Cpus[out->CpuCount++];
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memset(cpu, 0, sizeof(*cpu));
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cpu->LapicId = bsp;
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cpu->ProcessorUid = bsp;
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cpu->Flags = 1;
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cpu->Enabled = 1;
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cpu->IsBsp = 1;
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}
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return STATUS_SUCCESS;
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}
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// ---------------------------------------------------------------------------
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__declspec(dllexport) KSTATUS HalInitialize(const HAL_INIT_PARAMS* initParams) {
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if (gInitialised) return STATUS_ALREADY_EXISTS;
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@@ -357,12 +431,10 @@ __declspec(dllexport) KSTATUS HalInitialize(const HAL_INIT_PARAMS* initParams) {
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gApi.Version = HAL_API_VERSION;
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gInitialised = 1;
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// This shouldn't be here but i have no other way.
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// After i send 0xF4 and move the mouse the controller sends an interrupts that doesn't fire
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// and because the CPU missed the IRQ 12 edge transition (cli) later when we expect it to fire, it doesn't
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// leaving us with no mouse and no keyboard. The dreaded 8042 will hold the CLOCK line low forever.
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// To combat this we just go about our day executing the rest of the init and just before the end
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// of init we just iterate 256 times to grab whatever the controller left for us ("Drain and Pray").
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// The 8042 can leave output bytes pending while the keyboard/mouse drivers
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// are being brought up with interrupts temporarily disabled. Drain the
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// controller before returning from HAL init so stale status/data bytes do
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// not suppress the next keyboard or mouse interrupt edge.
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for (int i = 0; i < 256; i++) {
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if (__inbyte(0x64) & 0x01) {
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__inbyte(0x60); // Consume
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