move keyboard and mouse out of HAL into a standalone ps2.sys driver, implement usb stack with xhci controller discovery, hid keyboard/mouse, and bulk-only mass storage, add pci msi support with capability chain walking and software irq vector allocation (slots 16-23), rewrite user virtual memory as a USER_VA_REGION descriptor arena with per-process ownership tracking and guard page support, replacing the old bump allocator and top-down image region, add MmCreateUserRegion/MmDestroyAllUserRegions so process teardown reclaims all user va in one pass, allocate a pool-backed shadow framebuffer in hal_screen to fix cursor tearing and scroll corruption, reserve ap trampoline page below 1mb in uefi bootloader before boot services exit, rewrite memset/memcpy/memmove/memcmp with __stosq/__movsq intrinsics, promote driver flag literals to macros and add multi-tu STANDALONE_DRIVERS table to build.c, split rtl8139/rtl816x into header+source, rename KbReadScancode to KbReadKey, improve page fault output with MmDebugDescribeAddress and user region dump, fix %p to %016llX throughout.

2026-06-02 00:01:20 +02:00
1 parent b970d7f59c
commit b838f8d83d
@@ -0,0 +1,164 @@
+// rtl816x.h - shared rtl816x driver internals.
+#pragma once
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+#include <string.h>
+#include <intrin.h>
+
+#include <ntlite/ddi/hal_api.h>
+#include <ntlite/status.h>
+#include <kernel/ke_debug.h>
+#include <kernel/ke_irq.h>
+#include <kernel/ke_dpc.h>
+#include <kernel/ke_spinlock.h>
+#include <kernel/mm_phys.h>
+#include <kernel/mm_virt.h>
+#include <ntlite/ddi/net_device.h>
+
+#define RTL_VENDOR_REALTEK 0x10ECu
+#define RTL_DEVICE_8168    0x8168u
+#define RTL_DEVICE_8169    0x8169u
+
+#define PCI_REG_COMMAND    0x04u
+#define PCI_REG_BAR0       0x10u
+#define PCI_REG_IRQ        0x3Cu
+#define PCI_COMMAND_IO     (1u << 0)
+#define PCI_COMMAND_MEMORY (1u << 1)
+#define PCI_COMMAND_MASTER (1u << 2)
+#define PCI_COMMAND_INTX_DISABLE (1u << 10)
+
+#define RTL_REG_MAC0       0x00u
+#define RTL_REG_MAR0       0x08u
+#define RTL_REG_TNPDS_LO   0x20u
+#define RTL_REG_TNPDS_HI   0x24u
+#define RTL_REG_THPDS_LO   0x28u
+#define RTL_REG_THPDS_HI   0x2Cu
+#define RTL_REG_CHIP_CMD   0x37u
+#define RTL_REG_TX_POLL    0x38u
+#define RTL_REG_INTR_MASK  0x3Cu
+#define RTL_REG_INTR_STAT  0x3Eu
+#define RTL_REG_TX_CONFIG  0x40u
+#define RTL_REG_RX_CONFIG  0x44u
+#define RTL_REG_CFG9346    0x50u
+#define RTL_REG_CONFIG1    0x52u
+#define RTL_REG_PHY_STATUS 0x6Cu
+#define RTL_REG_RX_MAXSIZE 0xDAu
+#define RTL_REG_CPLUS_CMD  0xE0u
+#define RTL_REG_RDSAR_LO   0xE4u
+#define RTL_REG_RDSAR_HI   0xE8u
+
+#define RTL_CMD_RESET      0x10u
+#define RTL_CMD_RX_ENABLE  0x08u
+#define RTL_CMD_TX_ENABLE  0x04u
+
+#define RTL_TXPOLL_NPQ     0x40u
+
+#define RTL_ISR_ROK        0x0001u
+#define RTL_ISR_RER        0x0002u
+#define RTL_ISR_TOK        0x0004u
+#define RTL_ISR_TER        0x0008u
+#define RTL_ISR_RXOVW      0x0010u
+#define RTL_ISR_LINKCHG    0x0020u
+#define RTL_ISR_FOVW       0x0040u
+#define RTL_ISR_TDU        0x0080u
+#define RTL_ISR_SWINT      0x0100u
+#define RTL_ISR_TIMEOUT    0x4000u
+#define RTL_ISR_SYSERR     0x8000u
+
+#define RTL_INTR_ENABLES   (RTL_ISR_ROK | RTL_ISR_RER | RTL_ISR_TOK | RTL_ISR_TER | \
+                            RTL_ISR_RXOVW | RTL_ISR_LINKCHG | RTL_ISR_FOVW | \
+                            RTL_ISR_TDU | RTL_ISR_SYSERR)
+
+#define RTL_RXCFG_AAP      (1u << 0) // accept all physical packets/promiscuous
+#define RTL_RXCFG_APM      (1u << 1) // accept physical match
+#define RTL_RXCFG_AM       (1u << 2) // accept multicast
+#define RTL_RXCFG_AB       (1u << 3) // accept broadcast
+#define RTL_RXCFG_AR       (1u << 4) // accept runt
+#define RTL_RXCFG_AER      (1u << 5) // accept errored
+#define RTL_RXCFG_DMA_UNLIMITED (7u << 8)
+
+#define RTL_TXCFG_DMA_UNLIMITED (7u << 8)
+#define RTL_TXCFG_IFG          (3u << 24)
+
+#define RTL_DESC_OWN      (1u << 31)
+#define RTL_DESC_EOR      (1u << 30)
+#define RTL_DESC_FS       (1u << 29)
+#define RTL_DESC_LS       (1u << 28)
+#define RTL_RXDESC_RES    (1u << 21)
+#define RTL_RXDESC_RWT    (1u << 22)
+#define RTL_RXDESC_CRC    (1u << 19)
+#define RTL_RXDESC_RUNT   (1u << 20)
+#define RTL_DESC_LENGTH_MASK 0x00003FFFu
+
+#define RTL_RX_COUNT      64u
+#define RTL_TX_COUNT      64u
+#define RTL_BUF_SIZE      2048u
+#define RTL_RX_WIRE_MAX   (NET_ETHERNET_MAX_FRAME + 4u)
+#define RTL_RING_PAGES    1u
+#define RTL_RXBUF_PAGES   ((RTL_RX_COUNT * RTL_BUF_SIZE + 4095u) / 4096u)
+#define RTL_TXBUF_PAGES   ((RTL_TX_COUNT * RTL_BUF_SIZE + 4095u) / 4096u)
+#define RTL_MMIO_PAGES    1u
+
+#pragma pack(push, 1)
+typedef struct RTL_DESC {
+    volatile uint32_t opts1;
+    volatile uint32_t opts2;
+    volatile uint32_t addrLo;
+    volatile uint32_t addrHi;
+} RTL_DESC;
+#pragma pack(pop)
+
+typedef enum RTL_BAR_KIND {
+    RtlBarNone = 0,
+    RtlBarIo,
+    RtlBarMmio,
+} RTL_BAR_KIND;
+
+typedef struct RTL_BAR {
+    RTL_BAR_KIND Kind;
+    uint64_t     Base;
+    uint8_t      Index;
+} RTL_BAR;
+
+typedef struct RTL816X_DEVICE {
+    uint8_t Bus;
+    uint8_t Dev;
+    uint8_t Fn;
+    uint8_t Irq;
+    uint16_t DeviceId;
+
+    bool UseMmio;
+    volatile uint8_t* Mmio;
+    uint16_t IoBase;
+
+    RTL_DESC* RxRing;
+    RTL_DESC* TxRing;
+    PHYSICAL_ADDRESS RxRingPhys;
+    PHYSICAL_ADDRESS TxRingPhys;
+
+    uint8_t* RxBuffers;
+    uint8_t* TxBuffers;
+    PHYSICAL_ADDRESS RxBuffersPhys;
+    PHYSICAL_ADDRESS TxBuffersPhys;
+
+    uint32_t RxIndex;
+    uint32_t TxIndex;
+    SPINLOCK TxLock;
+    KDPC Dpc;
+    volatile uint16_t PendingIsr;
+
+    NET_DEVICE NetDevice;
+} RTL816X_DEVICE;
+
+
+extern const HAL_API* gHal;
+extern RTL816X_DEVICE gDevice;
+extern bool gDevicePresent;
+
+bool RtlFindDevice(uint8_t* outBus, uint8_t* outDev, uint8_t* outFn, uint16_t* outDeviceId);
+bool RtlReadBar(uint8_t bus, uint8_t dev, uint8_t fn, uint8_t index, RTL_BAR* out);
+KSTATUS RtlMapMmio(uint64_t physBase, volatile uint8_t** outMmio);
+KSTATUS RtlSelectRegisterBar(RTL816X_DEVICE* r);
+void RtlEnablePci(RTL816X_DEVICE* r);