implement user mode catchable exceptions, refactor system status codes to use NTLSTATUS_ prefix, update build scripts to use shared literal macros for linker arguments, update named queue lifetime cleanup to include KeNamedQueueUnpublishHandle.
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maksw committed
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@@ -499,12 +499,12 @@ void XhciUnregisterWaitTarget(XHCI_CONTROLLER* xhci, XHCI_WAIT_TARGET* target) {
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KSTATUS XhciWaitForArmedTarget(XHCI_CONTROLLER* xhci, XHCI_WAIT_TARGET* target,
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uint32_t timeoutUs) {
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if (!xhci || !target)
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return STATUS_INVALID_PARAMETER;
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return NTLSTATUS_INVALID_PARAMETER;
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for (uint32_t i = 0; i < timeoutUs; i++) {
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if (XhciWaitTargetComplete(target)) {
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XhciUnregisterWaitTarget(xhci, target);
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// The IRQ/DPC path normally owns the event ring after enumeration, but
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@@ -522,13 +522,13 @@ KSTATUS XhciWaitForArmedTarget(XHCI_CONTROLLER* xhci, XHCI_WAIT_TARGET* target,
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}
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XhciUnregisterWaitTarget(xhci, target);
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return STATUS_TIMEOUT;
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return NTLSTATUS_TIMEOUT;
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}
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KSTATUS XhciWaitForTarget(XHCI_CONTROLLER* xhci, XHCI_WAIT_TARGET* target,
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uint32_t timeoutUs) {
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if (!xhci || !target)
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return STATUS_INVALID_PARAMETER;
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return NTLSTATUS_INVALID_PARAMETER;
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XhciRegisterWaitTarget(xhci, target);
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return XhciWaitForArmedTarget(xhci, target, timeoutUs);
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}
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@@ -557,15 +557,15 @@ static uint32_t gXhciControllerCount;
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// Registers controller.
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static KSTATUS XhciRegisterController(XHCI_CONTROLLER* xhci) {
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if (!xhci) return STATUS_INVALID_PARAMETER;
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if (!xhci) return NTLSTATUS_INVALID_PARAMETER;
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for (uint32_t i = 0; i < gXhciControllerCount; i++) {
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if (gXhciControllers[i] == xhci)
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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if (gXhciControllerCount >= XHCI_MAX_CONTROLLERS)
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return STATUS_NO_MEMORY;
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return NTLSTATUS_NO_MEMORY;
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gXhciControllers[gXhciControllerCount++] = xhci;
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Implements the isr operation.
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@@ -589,7 +589,7 @@ void XhciIsr(void) {
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// Implements the bios Handoff operation.
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KSTATUS XhciBiosHandoff(XHCI_CONTROLLER* xhci) {
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uint32_t xecp = (xhci->Hcc1 >> 16) & 0xFFFFu;
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if (!xecp) return STATUS_SUCCESS;
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if (!xecp) return NTLSTATUS_SUCCESS;
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for (uint32_t guard = 0; xecp && guard < 64; guard++) {
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uint32_t off = xecp << 2;
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@@ -621,13 +621,13 @@ KSTATUS XhciBiosHandoff(XHCI_CONTROLLER* xhci) {
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// Clear legacy SMI enables/status. RW1C status bits tolerate this.
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XhciWrite32(xhci->Mmio, off + 4u, 0xFFFFFFFFu);
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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xecp = next;
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}
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Implements the stop And Reset operation.
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@@ -639,7 +639,7 @@ KSTATUS XhciStopAndReset(XHCI_CONTROLLER* xhci) {
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XHCI_USBSTS_HCH, 1000000u)) {
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DbgPrint("usb: xHCI stop timeout usbsts=%08x\n",
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XhciRead32(xhci->Op, XHCI_OP_USBSTS));
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return STATUS_TIMEOUT;
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return NTLSTATUS_TIMEOUT;
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}
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}
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@@ -648,35 +648,35 @@ KSTATUS XhciStopAndReset(XHCI_CONTROLLER* xhci) {
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XHCI_USBCMD_HCRST, 1000000u)) {
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DbgPrint("usb: xHCI reset timeout usbcmd=%08x\n",
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XhciRead32(xhci->Op, XHCI_OP_USBCMD));
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return STATUS_TIMEOUT;
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return NTLSTATUS_TIMEOUT;
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}
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if (!UsbWaitClear32(xhci->Hal, xhci->Op, XHCI_OP_USBSTS,
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XHCI_USBSTS_CNR, 1000000u)) {
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DbgPrint("usb: xHCI controller-not-ready timeout usbsts=%08x\n",
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XhciRead32(xhci->Op, XHCI_OP_USBSTS));
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return STATUS_TIMEOUT;
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return NTLSTATUS_TIMEOUT;
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}
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XhciWrite32(xhci->Op, XHCI_OP_USBSTS,
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XhciRead32(xhci->Op, XHCI_OP_USBSTS) & XHCI_USBSTS_CLEAR_MASK);
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Creates scratchpads.
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KSTATUS XhciAllocateScratchpads(XHCI_CONTROLLER* xhci) {
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if (xhci->ScratchpadCount == 0) return STATUS_SUCCESS;
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if (xhci->ScratchpadCount == 0) return NTLSTATUS_SUCCESS;
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if (xhci->ScratchpadCount > XHCI_MAX_SCRATCHPADS) {
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DbgPrint("usb: xHCI wants %u scratchpads, capped driver supports %u\n",
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xhci->ScratchpadCount, XHCI_MAX_SCRATCHPADS);
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return STATUS_NOT_SUPPORTED;
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return NTLSTATUS_NOT_SUPPORTED;
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}
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xhci->ScratchpadArray = (uint64_t*)UsbDmaAllocPages(xhci, 1, &xhci->ScratchpadArrayPhys);
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if (!xhci->ScratchpadArray) {
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DbgPrint("usb: xHCI scratchpad pointer-array allocation failed count=%u\n",
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xhci->ScratchpadCount);
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return STATUS_NO_MEMORY;
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return NTLSTATUS_NO_MEMORY;
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}
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for (uint16_t i = 0; i < xhci->ScratchpadCount; i++) {
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@@ -684,7 +684,7 @@ KSTATUS XhciAllocateScratchpads(XHCI_CONTROLLER* xhci) {
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if (!page) {
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DbgPrint("usb: xHCI scratchpad buffer allocation failed index=%u/%u\n",
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i, xhci->ScratchpadCount);
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return STATUS_NO_MEMORY;
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return NTLSTATUS_NO_MEMORY;
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}
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(void)page;
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xhci->ScratchpadArray[i] = xhci->ScratchpadPhys[i];
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@@ -694,7 +694,7 @@ KSTATUS XhciAllocateScratchpads(XHCI_CONTROLLER* xhci) {
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UsbTrace("usb: xHCI allocated %u scratchpad buffer(s) array=0x%016llX\n",
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xhci->ScratchpadCount,
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(unsigned long long)xhci->ScratchpadArrayPhys);
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Creates runtime Memory.
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@@ -707,7 +707,7 @@ KSTATUS XhciAllocateRuntimeMemory(XHCI_CONTROLLER* xhci) {
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if (!xhci->Dcbaa || !xhci->CommandRing || !xhci->EventRing || !xhci->Erst) {
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DbgPrint("usb: xHCI runtime DMA allocation failed dcbaa=0x%016llX cmd=0x%016llX event=0x%016llX erst=0x%016llX\n",
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xhci->Dcbaa, xhci->CommandRing, xhci->EventRing, xhci->Erst);
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return STATUS_NO_MEMORY;
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return NTLSTATUS_NO_MEMORY;
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}
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xhci->CommandEnqueue = 0;
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@@ -735,13 +735,13 @@ KSTATUS XhciAllocateRuntimeMemory(XHCI_CONTROLLER* xhci) {
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(unsigned long long)xhci->CommandRingPhys,
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(unsigned long long)xhci->EventRingPhys,
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(unsigned long long)xhci->ErstPhys);
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Implements the program Runtime operation.
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KSTATUS XhciProgramRuntime(XHCI_CONTROLLER* xhci) {
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uint8_t slots = xhci->MaxSlots;
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if (slots == 0) return STATUS_DEVICE_ERROR;
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if (slots == 0) return NTLSTATUS_DEVICE_ERROR;
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XhciWrite64(xhci->Op, XHCI_OP_DCBAAP, xhci->DcbaaPhys);
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XhciWrite64(xhci->Op, XHCI_OP_CRCR, xhci->CommandRingPhys | xhci->CommandCycle);
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@@ -756,7 +756,7 @@ KSTATUS XhciProgramRuntime(XHCI_CONTROLLER* xhci) {
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XhciWrite64(ir0, 0x18u, xhci->EventRingPhys);
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XhciBarrier();
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Implements the command Trb Phys operation.
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@@ -770,7 +770,7 @@ static KSTATUS XhciCommandRingAppend(XHCI_CONTROLLER* xhci,
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uint32_t controlWithoutCycle,
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uint64_t* outPhys) {
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if (!xhci || !xhci->CommandRing)
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return STATUS_INVALID_PARAMETER;
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return NTLSTATUS_INVALID_PARAMETER;
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if (xhci->CommandEnqueue >= XHCI_RING_TRBS - 1u) {
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XHCI_TRB* link = &xhci->CommandRing[XHCI_RING_TRBS - 1u];
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@@ -796,7 +796,7 @@ static KSTATUS XhciCommandRingAppend(XHCI_CONTROLLER* xhci,
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trb->Control = controlWithoutCycle | xhci->CommandCycle;
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if (outPhys) *outPhys = trbPhys;
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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KSTATUS XhciSubmitCommand(XHCI_CONTROLLER* xhci,
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@@ -805,7 +805,7 @@ KSTATUS XhciSubmitCommand(XHCI_CONTROLLER* xhci,
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uint32_t controlWithoutCycle,
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XHCI_COMMAND_RESULT* outResult) {
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if (!xhci)
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return STATUS_INVALID_PARAMETER;
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return NTLSTATUS_INVALID_PARAMETER;
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XHCI_WAIT_TARGET target;
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memset(&target, 0, sizeof(target));
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@@ -829,8 +829,8 @@ KSTATUS XhciSubmitCommand(XHCI_CONTROLLER* xhci,
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if (KSUCCESS(waitStatus) && target.CommandMatched) {
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if (outResult) *outResult = target.Command;
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return (target.Command.CompletionCode == XHCI_CC_SUCCESS)
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? STATUS_SUCCESS
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: STATUS_DEVICE_ERROR;
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? NTLSTATUS_SUCCESS
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: NTLSTATUS_DEVICE_ERROR;
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}
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DbgPrint("usb: xHCI command timeout type=%u usbsts=%08x crcr=0x%016llX\n",
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@@ -852,7 +852,7 @@ KSTATUS XhciSubmitNoopCommand(XHCI_CONTROLLER* xhci) {
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if (KSUCCESS(st)) {
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UsbTrace("usb: xHCI No-Op command completed successfully\n");
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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DbgPrint("usb: xHCI No-Op command failed st=0x%x cc=%u\n",
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@@ -877,17 +877,17 @@ KSTATUS XhciEnableSlot(XHCI_CONTROLLER* xhci, uint8_t* outSlotId) {
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}
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if (result.SlotId == 0 || result.SlotId > XHCI_MAX_TRACKED_SLOTS) {
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DbgPrint("usb: xHCI Enable Slot returned unsupported slot=%u\n", result.SlotId);
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return STATUS_DEVICE_ERROR;
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return NTLSTATUS_DEVICE_ERROR;
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}
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*outSlotId = result.SlotId;
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UsbTrace("usb: xHCI Enable Slot -> slot %u\n", result.SlotId);
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Disables slot.
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KSTATUS XhciDisableSlot(XHCI_CONTROLLER* xhci, uint8_t slotId) {
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if (!xhci || slotId == 0)
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return STATUS_INVALID_PARAMETER;
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return NTLSTATUS_INVALID_PARAMETER;
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XHCI_COMMAND_RESULT res;
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memset(&res, 0, sizeof(res));
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@@ -901,9 +901,9 @@ KSTATUS XhciDisableSlot(XHCI_CONTROLLER* xhci, uint8_t slotId) {
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return st;
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if (res.CompletionCode != XHCI_CC_SUCCESS) {
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DbgPrint("usb: Disable Slot slot=%u failed cc=%u\n", slotId, res.CompletionCode);
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return STATUS_DEVICE_ERROR;
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return NTLSTATUS_DEVICE_ERROR;
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}
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Implements the address Device operation.
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@@ -923,7 +923,7 @@ KSTATUS XhciAddressDevice(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev) {
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return st;
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}
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UsbTrace("usb: xHCI Address Device slot=%u complete\n", dev->SlotId);
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Starts the requested operation.
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@@ -936,11 +936,11 @@ KSTATUS XhciStart(XHCI_CONTROLLER* xhci) {
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XHCI_USBSTS_HCH, 1000000u)) {
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DbgPrint("usb: xHCI start timeout usbsts=%08x\n",
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XhciRead32(xhci->Op, XHCI_OP_USBSTS));
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return STATUS_TIMEOUT;
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return NTLSTATUS_TIMEOUT;
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}
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xhci->Running = true;
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Enables interrupts.
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@@ -979,7 +979,7 @@ KSTATUS XhciResetPort(XHCI_CONTROLLER* xhci, uint8_t port, uint8_t* outSpeed) {
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uint32_t off = XhciPortReg(port);
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uint32_t portsc = XhciRead32(xhci->Op, off);
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if (!(portsc & XHCI_PORTSC_CCS))
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return STATUS_NOT_FOUND;
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return NTLSTATUS_NOT_FOUND;
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uint32_t speed = (portsc & XHCI_PORTSC_SPEED_MASK) >> XHCI_PORTSC_SPEED_SHIFT;
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uint8_t protocol = XhciPortProtocolMajor(xhci, port, portsc);
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@@ -1018,8 +1018,8 @@ KSTATUS XhciResetPort(XHCI_CONTROLLER* xhci, uint8_t port, uint8_t* outSpeed) {
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protocol, XhciPortSpeedName(speed), speed);
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if (!enabled || !(portsc & XHCI_PORTSC_CCS) || !(portsc & XHCI_PORTSC_PED))
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return STATUS_DEVICE_ERROR;
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return STATUS_SUCCESS;
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return NTLSTATUS_DEVICE_ERROR;
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return NTLSTATUS_SUCCESS;
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}
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uint32_t reset = (portsc & XHCI_PORTSC_PP) | XHCI_PORTSC_PR;
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@@ -1038,7 +1038,7 @@ KSTATUS XhciResetPort(XHCI_CONTROLLER* xhci, uint8_t port, uint8_t* outSpeed) {
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if (!resetDone) {
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DbgPrint("usb: xHCI port %u reset timeout portsc=%08x\n", port, portsc);
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return STATUS_TIMEOUT;
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return NTLSTATUS_TIMEOUT;
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}
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XhciClearPortChanges(xhci, port);
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@@ -1052,9 +1052,9 @@ KSTATUS XhciResetPort(XHCI_CONTROLLER* xhci, uint8_t port, uint8_t* outSpeed) {
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protocol, XhciPortSpeedName(speed), speed);
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if (!(portsc & XHCI_PORTSC_CCS) || !(portsc & XHCI_PORTSC_PED))
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return STATUS_DEVICE_ERROR;
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return NTLSTATUS_DEVICE_ERROR;
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Creates device Memory.
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@@ -1065,7 +1065,7 @@ KSTATUS XhciAllocateDeviceMemory(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev) {
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dev->DescriptorBuffer = (uint8_t*)UsbDmaAllocPages(xhci, 1, &dev->DescriptorPhys);
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if (!dev->InputContext || !dev->DeviceContext || !dev->Ep0Ring || !dev->DescriptorBuffer)
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return STATUS_NO_MEMORY;
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return NTLSTATUS_NO_MEMORY;
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dev->Ep0Enqueue = 0;
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dev->Ep0Cycle = 1;
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@@ -1078,7 +1078,7 @@ KSTATUS XhciAllocateDeviceMemory(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev) {
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XHCI_TRB_LINK_TC |
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dev->Ep0Cycle;
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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// Builds default Control Context.
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@@ -1135,7 +1135,7 @@ KSTATUS XhciEp0AppendTrb(XHCI_DEVICE* dev,
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uint32_t controlWithoutCycle,
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uint64_t* outPhys) {
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if (!dev || !dev->Ep0Ring)
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return STATUS_INVALID_PARAMETER;
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return NTLSTATUS_INVALID_PARAMETER;
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if (dev->Ep0Enqueue >= XHCI_EP0_RING_TRBS - 1u) {
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XHCI_TRB* link = &dev->Ep0Ring[XHCI_EP0_RING_TRBS - 1u];
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@@ -1161,7 +1161,7 @@ KSTATUS XhciEp0AppendTrb(XHCI_DEVICE* dev,
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trb->Control = controlWithoutCycle | dev->Ep0Cycle;
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if (outPhys) *outPhys = phys;
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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}
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KSTATUS XhciControlInTimeout(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
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@@ -1171,7 +1171,7 @@ KSTATUS XhciControlInTimeout(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
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uint16_t length,
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uint32_t timeoutUs) {
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if (!buffer || length == 0 || length > PAGE_SIZE)
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return STATUS_INVALID_PARAMETER;
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return NTLSTATUS_INVALID_PARAMETER;
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memset(buffer, 0, length);
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@@ -1223,13 +1223,13 @@ KSTATUS XhciControlInTimeout(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
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return st;
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}
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if (target.Transfer.CompletionCode == XHCI_CC_SUCCESS)
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return STATUS_SUCCESS;
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return NTLSTATUS_SUCCESS;
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DbgPrint("usb: xHCI control IN failed slot=%u cc=%u residue=%u\n",
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dev->SlotId,
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target.Transfer.CompletionCode,
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target.Transfer.Residue);
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return STATUS_DEVICE_ERROR;
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return NTLSTATUS_DEVICE_ERROR;
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}
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KSTATUS XhciControlIn(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
@@ -1282,13 +1282,13 @@ KSTATUS XhciControlNoData(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
return st;
|
||||
}
|
||||
if (target.Transfer.CompletionCode == XHCI_CC_SUCCESS)
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
|
||||
DbgPrint("usb: xHCI control no-data failed slot=%u cc=%u residue=%u\n",
|
||||
dev->SlotId,
|
||||
target.Transfer.CompletionCode,
|
||||
target.Transfer.Residue);
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
KSTATUS XhciGetDeviceDescriptorTimeout(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
@@ -1314,10 +1314,10 @@ KSTATUS XhciGetDeviceDescriptorTimeout(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
outDesc->bDescriptorType != USB_DESC_DEVICE) {
|
||||
DbgPrint("usb: invalid device descriptor slot=%u len=%u type=%u\n",
|
||||
dev->SlotId, outDesc->bLength, outDesc->bDescriptorType);
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
|
||||
KSTATUS XhciGetDeviceDescriptor(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
@@ -1353,7 +1353,7 @@ KSTATUS XhciGetConfigurationDescriptor(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
outConfig->bLength,
|
||||
outConfig->bDescriptorType,
|
||||
outConfig->wTotalLength);
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
uint16_t total = outConfig->wTotalLength;
|
||||
@@ -1378,11 +1378,11 @@ KSTATUS XhciGetConfigurationDescriptor(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
configurationIndex,
|
||||
outConfig->bLength,
|
||||
outConfig->bDescriptorType);
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (outTotalLength) *outTotalLength = total;
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
|
||||
// Implements the endpoint Id From Address operation.
|
||||
@@ -1420,7 +1420,7 @@ KSTATUS XhciRingAppend(XHCI_TRB* ring, PHYSICAL_ADDRESS ringPhys,
|
||||
uint64_t parameter, uint32_t status,
|
||||
uint32_t controlWithoutCycle, uint64_t* outPhys) {
|
||||
if (!ring || !enqueue || !cycle || trbCount < 2)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
if (*enqueue >= trbCount - 1u) {
|
||||
XHCI_TRB* link = &ring[trbCount - 1u];
|
||||
@@ -1446,7 +1446,7 @@ KSTATUS XhciRingAppend(XHCI_TRB* ring, PHYSICAL_ADDRESS ringPhys,
|
||||
trb->Control = controlWithoutCycle | *cycle;
|
||||
|
||||
if (outPhys) *outPhys = phys;
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
|
||||
void XhciInitialiseTransferRing(XHCI_TRB* ring, PHYSICAL_ADDRESS ringPhys,
|
||||
@@ -1471,9 +1471,9 @@ KSTATUS XhciBulkTransfer(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
uint32_t length,
|
||||
uint32_t* outActual) {
|
||||
if (!xhci || !dev || !ring || !enqueue || !cycle || !bufferPhys || length == 0)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
if (length > USB_STORAGE_MAX_BYTES)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
uint64_t trbPhys = 0;
|
||||
KSTATUS st = XhciRingAppend(ring,
|
||||
@@ -1511,36 +1511,36 @@ KSTATUS XhciBulkTransfer(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev,
|
||||
endpointId,
|
||||
target.Transfer.CompletionCode,
|
||||
target.Transfer.Residue);
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (outActual)
|
||||
*outActual = length - target.Transfer.Residue;
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
|
||||
// Implements the configure Pipe Endpoint operation.
|
||||
KSTATUS XhciConfigurePipeEndpoint(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev, USB_PIPE* pipe) {
|
||||
if (!xhci || !dev || !pipe || !pipe->Open)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
uint8_t dci = pipe->EndpointId;
|
||||
if (dci < 2 || dci > 31)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
if (pipe->HcdPipeContext) {
|
||||
XHCI_PIPE_CONTEXT* ctx = (XHCI_PIPE_CONTEXT*)pipe->HcdPipeContext;
|
||||
return ctx->Configured ? STATUS_SUCCESS : STATUS_DEVICE_ERROR;
|
||||
return ctx->Configured ? NTLSTATUS_SUCCESS : NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
XHCI_PIPE_CONTEXT* ctx = (XHCI_PIPE_CONTEXT*)MmAllocatePool(sizeof(XHCI_PIPE_CONTEXT));
|
||||
if (!ctx) return STATUS_NO_MEMORY;
|
||||
if (!ctx) return NTLSTATUS_NO_MEMORY;
|
||||
memset(ctx, 0, sizeof(*ctx));
|
||||
|
||||
ctx->Ring = (XHCI_TRB*)UsbDmaAllocPages(xhci, 1, &ctx->RingPhys);
|
||||
if (!ctx->Ring) {
|
||||
MmFreePool(ctx);
|
||||
return STATUS_NO_MEMORY;
|
||||
return NTLSTATUS_NO_MEMORY;
|
||||
}
|
||||
ctx->Enqueue = 0;
|
||||
ctx->Cycle = 1;
|
||||
@@ -1575,7 +1575,7 @@ KSTATUS XhciConfigurePipeEndpoint(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev, USB_P
|
||||
endpointType = XHCI_EP_TYPE_BULK_OUT;
|
||||
} else {
|
||||
MmFreePool(ctx);
|
||||
return STATUS_NOT_SUPPORTED;
|
||||
return NTLSTATUS_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
ep[0] = (uint32_t)interval << 16;
|
||||
@@ -1597,31 +1597,31 @@ KSTATUS XhciConfigurePipeEndpoint(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev, USB_P
|
||||
DbgPrint("usb: Configure pipe endpoint failed slot=%u ep=%u type=%u st=0x%x cc=%u\n",
|
||||
dev->SlotId, dci, pipe->Type, st, result.CompletionCode);
|
||||
MmFreePool(ctx);
|
||||
return KSUCCESS(st) ? STATUS_DEVICE_ERROR : st;
|
||||
return KSUCCESS(st) ? NTLSTATUS_DEVICE_ERROR : st;
|
||||
}
|
||||
|
||||
ctx->Configured = true;
|
||||
pipe->HcdPipeContext = ctx;
|
||||
dev->EndpointPipes[dci] = pipe;
|
||||
UsbReferencePipe(pipe);
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
|
||||
// Implements the hcd Submit Interrupt Urb operation.
|
||||
static KSTATUS XhciHcdSubmitInterruptUrb(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev, USB_URB* urb) {
|
||||
if (!xhci || !dev || !urb || !urb->Pipe || !urb->BufferPhys || urb->Length == 0)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
if (urb->Pipe->Type != UsbPipeInterrupt || !(urb->Pipe->EndpointAddress & USB_ENDPOINT_DIR_IN))
|
||||
return STATUS_NOT_SUPPORTED;
|
||||
return NTLSTATUS_NOT_SUPPORTED;
|
||||
|
||||
KSTATUS st = XhciConfigurePipeEndpoint(xhci, dev, urb->Pipe);
|
||||
if (!KSUCCESS(st)) return st;
|
||||
|
||||
XHCI_PIPE_CONTEXT* ctx = (XHCI_PIPE_CONTEXT*)urb->Pipe->HcdPipeContext;
|
||||
if (!ctx || !ctx->Configured)
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
if (ctx->ActiveTransfer)
|
||||
return STATUS_QUEUE_FULL;
|
||||
return NTLSTATUS_QUEUE_FULL;
|
||||
|
||||
uint64_t trbPhys = 0;
|
||||
st = XhciRingAppend(ctx->Ring,
|
||||
@@ -1642,13 +1642,13 @@ static KSTATUS XhciHcdSubmitInterruptUrb(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev
|
||||
ctx->ActiveUrb = urb;
|
||||
urb->Pending = true;
|
||||
urb->Cancelled = false;
|
||||
urb->Status = STATUS_PENDING;
|
||||
urb->Status = NTLSTATUS_PENDING;
|
||||
urb->ActualLength = 0;
|
||||
urb->HcdCompletionCode = 0;
|
||||
|
||||
XhciBarrier();
|
||||
XhciWrite32(xhci->Doorbells, (uint32_t)dev->SlotId * 4u, ctx->EndpointId);
|
||||
return STATUS_PENDING;
|
||||
return NTLSTATUS_PENDING;
|
||||
}
|
||||
|
||||
void XhciHandleAsyncTransferEvent(XHCI_CONTROLLER* xhci, uint64_t trbPhys,
|
||||
@@ -1674,12 +1674,12 @@ void XhciHandleAsyncTransferEvent(XHCI_CONTROLLER* xhci, uint64_t trbPhys,
|
||||
if (!urb)
|
||||
return;
|
||||
|
||||
KSTATUS st = STATUS_SUCCESS;
|
||||
KSTATUS st = NTLSTATUS_SUCCESS;
|
||||
if (urb->Cancelled) {
|
||||
st = STATUS_CANCELLED;
|
||||
st = NTLSTATUS_CANCELLED;
|
||||
} else if (completionCode != XHCI_CC_SUCCESS &&
|
||||
completionCode != XHCI_CC_SHORT_PACKET) {
|
||||
st = STATUS_DEVICE_ERROR;
|
||||
st = NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
uint32_t actual = 0;
|
||||
@@ -1705,7 +1705,7 @@ void XhciHandleAsyncTransferEvent(XHCI_CONTROLLER* xhci, uint64_t trbPhys,
|
||||
// Implements the hcd Submit Bulk Urb operation.
|
||||
static KSTATUS XhciHcdSubmitBulkUrb(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev, USB_URB* urb) {
|
||||
if (!xhci || !dev || !urb || !urb->Pipe || !urb->BufferPhys || urb->Length == 0)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
uint8_t endpointId = urb->Pipe->EndpointId;
|
||||
XHCI_TRB* ring = (XHCI_TRB*)0;
|
||||
@@ -1724,7 +1724,7 @@ static KSTATUS XhciHcdSubmitBulkUrb(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev, USB
|
||||
enqueue = &dev->MassOutEnqueue;
|
||||
cycle = &dev->MassOutCycle;
|
||||
} else {
|
||||
return STATUS_NOT_SUPPORTED;
|
||||
return NTLSTATUS_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
uint32_t actual = 0;
|
||||
@@ -1745,12 +1745,12 @@ static KSTATUS XhciHcdSubmitBulkUrb(XHCI_CONTROLLER* xhci, XHCI_DEVICE* dev, USB
|
||||
// Implements the hcd Submit Urb operation.
|
||||
static KSTATUS XhciHcdSubmitUrb(USB_HCD* hcd, USB_URB* urb) {
|
||||
if (!hcd || !urb || !urb->Device)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
XHCI_CONTROLLER* xhci = (XHCI_CONTROLLER*)hcd->ControllerContext;
|
||||
XHCI_DEVICE* dev = (XHCI_DEVICE*)urb->Device->HcdDeviceContext;
|
||||
if (!xhci || !dev || !dev->Allocated)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
KSTATUS st;
|
||||
switch (urb->Function) {
|
||||
@@ -1762,7 +1762,7 @@ static KSTATUS XhciHcdSubmitUrb(USB_HCD* hcd, USB_URB* urb) {
|
||||
st = XhciControlIn(xhci, dev, &urb->Setup, urb->Buffer, urb->BufferPhys, (uint16_t)urb->Length);
|
||||
urb->ActualLength = KSUCCESS(st) ? urb->Length : 0;
|
||||
} else {
|
||||
st = STATUS_NOT_SUPPORTED;
|
||||
st = NTLSTATUS_NOT_SUPPORTED;
|
||||
urb->ActualLength = 0;
|
||||
}
|
||||
break;
|
||||
@@ -1776,7 +1776,7 @@ static KSTATUS XhciHcdSubmitUrb(USB_HCD* hcd, USB_URB* urb) {
|
||||
break;
|
||||
|
||||
default:
|
||||
st = STATUS_NOT_SUPPORTED;
|
||||
st = NTLSTATUS_NOT_SUPPORTED;
|
||||
urb->ActualLength = 0;
|
||||
break;
|
||||
}
|
||||
@@ -1788,11 +1788,11 @@ static KSTATUS XhciHcdSubmitUrb(USB_HCD* hcd, USB_URB* urb) {
|
||||
// Implements the hcd Cancel Urb operation.
|
||||
static KSTATUS XhciHcdCancelUrb(USB_HCD* hcd, USB_URB* urb) {
|
||||
(void)hcd;
|
||||
if (!urb) return STATUS_INVALID_PARAMETER;
|
||||
if (!urb) return NTLSTATUS_INVALID_PARAMETER;
|
||||
urb->Cancelled = true;
|
||||
if (!urb->Pending)
|
||||
urb->Status = STATUS_CANCELLED;
|
||||
return STATUS_SUCCESS;
|
||||
urb->Status = NTLSTATUS_CANCELLED;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
|
||||
// Implements the hcd Allocate Dma operation.
|
||||
@@ -1803,15 +1803,15 @@ static void* XhciHcdAllocateDma(USB_HCD* hcd, size_t pages, PHYSICAL_ADDRESS* ou
|
||||
|
||||
// Implements the hcd Reset Root Port operation.
|
||||
static KSTATUS XhciHcdResetRootPort(USB_HCD* hcd, uint8_t port, uint8_t* outSpeed) {
|
||||
if (!hcd) return STATUS_INVALID_PARAMETER;
|
||||
if (!hcd) return NTLSTATUS_INVALID_PARAMETER;
|
||||
return XhciResetPort((XHCI_CONTROLLER*)hcd->ControllerContext, port, outSpeed);
|
||||
}
|
||||
|
||||
// Implements the hcd Clear Root Port Changes operation.
|
||||
static KSTATUS XhciHcdClearRootPortChanges(USB_HCD* hcd, uint8_t port) {
|
||||
if (!hcd) return STATUS_INVALID_PARAMETER;
|
||||
if (!hcd) return NTLSTATUS_INVALID_PARAMETER;
|
||||
XhciClearPortChanges((XHCI_CONTROLLER*)hcd->ControllerContext, port);
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
|
||||
const USB_HCD_OPERATIONS gXhciHcdOperations = {
|
||||
@@ -1825,9 +1825,9 @@ const USB_HCD_OPERATIONS gXhciHcdOperations = {
|
||||
// Starts controller.
|
||||
KSTATUS XhciStartController(XHCI_CONTROLLER* xhci) {
|
||||
if (!xhci || xhci->Magic != XHCI_CONTROLLER_MAGIC || !xhci->Pdo || !xhci->Fdo)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
if (xhci->Running)
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
|
||||
KSTATUS st = PciGetDeviceInfo(xhci->Pdo, &xhci->PciInfo);
|
||||
if (!KSUCCESS(st)) {
|
||||
@@ -1848,7 +1848,7 @@ KSTATUS XhciStartController(XHCI_CONTROLLER* xhci) {
|
||||
if (xhci->MmioBar.Type != PciBarMemory32 && xhci->MmioBar.Type != PciBarMemory64) {
|
||||
DbgPrint("usb: xHCI PCI %02x:%02x.%x BAR0 is not MMIO type=%u\n",
|
||||
xhci->Bus, xhci->Dev, xhci->Fn, xhci->MmioBar.Type);
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
xhci->Irq = 0xFFu;
|
||||
@@ -1914,7 +1914,7 @@ KSTATUS XhciStartController(XHCI_CONTROLLER* xhci) {
|
||||
xhci->MaxSlots == 0 || xhci->MaxPorts == 0) {
|
||||
DbgPrint("usb: xHCI invalid caps caplen=%u dboff=0x%x rtsoff=0x%x hcs1=%08x\n",
|
||||
xhci->CapLength, xhci->DbOff, xhci->RtsOff, xhci->Hcs1);
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
uint32_t portEnd = xhci->CapLength + XHCI_OP_PORT_BASE +
|
||||
@@ -1926,7 +1926,7 @@ KSTATUS XhciStartController(XHCI_CONTROLLER* xhci) {
|
||||
if (xhci->MmioBytes < needBytes) {
|
||||
DbgPrint("usb: xHCI BAR0 too small length=0x%x need=0x%x dboff=0x%x rtsoff=0x%x ports=%u\n",
|
||||
xhci->MmioBytes, needBytes, xhci->DbOff, xhci->RtsOff, xhci->MaxPorts);
|
||||
return STATUS_DEVICE_ERROR;
|
||||
return NTLSTATUS_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
xhci->Op = xhci->Mmio + xhci->CapLength;
|
||||
@@ -1957,7 +1957,7 @@ KSTATUS XhciStartController(XHCI_CONTROLLER* xhci) {
|
||||
uint32_t pageSize = XhciRead32(xhci->Op, XHCI_OP_PAGESIZE);
|
||||
if ((pageSize & 1u) == 0) {
|
||||
DbgPrint("usb: xHCI does not advertise 4K pages pagesize=%08x\n", pageSize);
|
||||
return STATUS_NOT_SUPPORTED;
|
||||
return NTLSTATUS_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
st = XhciAllocateRuntimeMemory(xhci);
|
||||
@@ -1976,7 +1976,7 @@ KSTATUS XhciStartController(XHCI_CONTROLLER* xhci) {
|
||||
XhciLogPortStatus(xhci);
|
||||
|
||||
st = UsbCreateRootHubPdo(&xhci->Hcd);
|
||||
if (!KSUCCESS(st) && st != STATUS_ALREADY_EXISTS) {
|
||||
if (!KSUCCESS(st) && st != NTLSTATUS_ALREADY_EXISTS) {
|
||||
DbgPrint("usb: root hub PDO creation failed st=0x%x\n", st);
|
||||
return st;
|
||||
}
|
||||
@@ -2008,20 +2008,20 @@ KSTATUS XhciStartController(XHCI_CONTROLLER* xhci) {
|
||||
|
||||
DbgPrint("usb: xHCI host controller initialised; HID boot input active=%u mass-storage will arrive through hotplug\n",
|
||||
xhci->HidDeviceCount);
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
|
||||
// Dispatches pnp.
|
||||
KSTATUS XhciDispatchPnp(DEVICE_OBJECT* device, IRP* irp) {
|
||||
if (!device || !irp || !device->DeviceExtension)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
XHCI_CONTROLLER* xhci = (XHCI_CONTROLLER*)device->DeviceExtension;
|
||||
if (xhci->Magic != XHCI_CONTROLLER_MAGIC)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
IO_STACK_LOCATION* ios = IoGetCurrentIrpStackLocation(irp);
|
||||
if (!ios) return STATUS_INVALID_PARAMETER;
|
||||
if (!ios) return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
switch ((IO_PNP_MINOR_FUNCTION)ios->MinorFunction) {
|
||||
case IRP_MN_START_DEVICE:
|
||||
@@ -2029,11 +2029,11 @@ KSTATUS XhciDispatchPnp(DEVICE_OBJECT* device, IRP* irp) {
|
||||
|
||||
case IRP_MN_QUERY_REMOVE_DEVICE:
|
||||
device->PnpState = DevicePnpRemovePending;
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
|
||||
case IRP_MN_CANCEL_REMOVE_DEVICE:
|
||||
device->PnpState = xhci->Running ? DevicePnpStarted : DevicePnpNotStarted;
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
|
||||
case IRP_MN_SURPRISE_REMOVAL:
|
||||
device->PnpState = DevicePnpSurpriseRemoved;
|
||||
@@ -2045,7 +2045,7 @@ KSTATUS XhciDispatchPnp(DEVICE_OBJECT* device, IRP* irp) {
|
||||
}
|
||||
if (xhci->Hcd.RootHubPdo)
|
||||
(void)UsbRemovePdoSubtree(xhci->Hcd.RootHubPdo, true);
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
|
||||
case IRP_MN_REMOVE_DEVICE:
|
||||
device->PnpState = DevicePnpDeleted;
|
||||
@@ -2055,7 +2055,7 @@ KSTATUS XhciDispatchPnp(DEVICE_OBJECT* device, IRP* irp) {
|
||||
(void)UsbRemovePdoSubtree(xhci->Hcd.RootHubPdo, true);
|
||||
IoDetachDevice(device);
|
||||
IoDeleteDevice(device);
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
|
||||
default:
|
||||
return IoForwardIrpToLower(device, irp);
|
||||
@@ -2065,7 +2065,7 @@ KSTATUS XhciDispatchPnp(DEVICE_OBJECT* device, IRP* irp) {
|
||||
// Implements the add Device operation.
|
||||
KSTATUS XhciAddDevice(DRIVER_OBJECT* driver, DEVICE_OBJECT* physicalDeviceObject) {
|
||||
if (!driver || !physicalDeviceObject || physicalDeviceObject->Type != DeviceObjectPhysical)
|
||||
return STATUS_INVALID_PARAMETER;
|
||||
return NTLSTATUS_INVALID_PARAMETER;
|
||||
|
||||
DEVICE_OBJECT* fdo = (DEVICE_OBJECT*)0;
|
||||
KSTATUS st = IoCreateDevice(driver, sizeof(XHCI_CONTROLLER), &fdo);
|
||||
@@ -2085,9 +2085,9 @@ KSTATUS XhciAddDevice(DRIVER_OBJECT* driver, DEVICE_OBJECT* physicalDeviceObject
|
||||
xhci->LowerDevice = IoAttachDeviceToDeviceStack(fdo, physicalDeviceObject);
|
||||
if (!xhci->LowerDevice) {
|
||||
IoDeleteDevice(fdo);
|
||||
return STATUS_FAILURE;
|
||||
return NTLSTATUS_FAILURE;
|
||||
}
|
||||
|
||||
DbgPrint("usb: xHCI FDO attached to %v\n", physicalDeviceObject->Name);
|
||||
return STATUS_SUCCESS;
|
||||
return NTLSTATUS_SUCCESS;
|
||||
}
|
||||
Reference in new issue
Block a user