add display subsystem and vmwaresvga driver, support absolute mouse and qemu tablet, map pci mmio to private virtual aperture, better smp panic handling, remove legacy io publish/match, add sys query display info and display command to native shell

2026-06-15 09:58:12 +02:00
1 parent e41bf6e2c0
commit 6260de0085
@@ -0,0 +1,215 @@
+#pragma once
+// vmwaresvga.h - VMware SVGA-II display provider internals.
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include <string.h>
+#include <intrin.h>
+
+#include <ntlite/status.h>
+#include <ntlite/ddi/hal_api.h>
+#include <ntlite/ddi/io_driver.h>
+#include <ntlite/ddi/pci.h>
+#include <ntlite/ddi/display.h>
+#include <kernel/ke_display.h>
+#include <kernel/ke_debug.h>
+#include <kernel/mm_virt.h>
+#include <kernel/display_cursor.h>
+
+#define VMWSVGA_VENDOR_VMWARE      0x15ADu
+#define VMWSVGA_DEVICE_SVGA2       0x0405u
+#define VMWSVGA_DEVICE_MAGIC       0x564D5356u /* VMSV */
+
+#define SVGA_ID_INVALID            0xFFFFFFFFu
+#define SVGA_ID_0                  0x90000000u
+#define SVGA_ID_1                  0x90000001u
+#define SVGA_ID_2                  0x90000002u
+
+#define SVGA_INDEX_PORT            0u
+#define SVGA_VALUE_PORT            1u
+
+#define SVGA_REG_ID                0u
+#define SVGA_REG_ENABLE            1u
+#define SVGA_REG_WIDTH             2u
+#define SVGA_REG_HEIGHT            3u
+#define SVGA_REG_MAX_WIDTH         4u
+#define SVGA_REG_MAX_HEIGHT        5u
+#define SVGA_REG_DEPTH             6u
+#define SVGA_REG_BITS_PER_PIXEL    7u
+#define SVGA_REG_BYTES_PER_LINE    12u
+#define SVGA_REG_FB_START          13u
+#define SVGA_REG_FB_OFFSET         14u
+#define SVGA_REG_VRAM_SIZE         15u
+#define SVGA_REG_FB_SIZE           16u
+#define SVGA_REG_CAPABILITIES      17u
+#define SVGA_REG_MEM_START         18u
+#define SVGA_REG_MEM_SIZE          19u
+#define SVGA_REG_CONFIG_DONE       20u
+#define SVGA_REG_SYNC              21u
+#define SVGA_REG_BUSY              22u
+#define SVGA_REG_GUEST_ID          23u
+#define SVGA_REG_CURSOR_ID         24u
+#define SVGA_REG_CURSOR_X          25u
+#define SVGA_REG_CURSOR_Y          26u
+#define SVGA_REG_CURSOR_ON         27u
+#define SVGA_REG_HOST_BITS_PER_PIXEL 28u
+#define SVGA_REG_MEM_REGS          30u
+#define SVGA_REG_NUM_GUEST_DISPLAYS 34u
+#define SVGA_REG_DISPLAY_ID        35u
+#define SVGA_REG_DISPLAY_IS_PRIMARY 36u
+#define SVGA_REG_DISPLAY_POSITION_X 37u
+#define SVGA_REG_DISPLAY_POSITION_Y 38u
+#define SVGA_REG_DISPLAY_WIDTH     39u
+#define SVGA_REG_DISPLAY_HEIGHT    40u
+#define SVGA_REG_PITCHLOCK         32u
+
+#define SVGA_CMD_INVALID_CMD       0u
+#define SVGA_CMD_UPDATE            1u
+#define SVGA_CMD_RECT_FILL         2u
+#define SVGA_CMD_RECT_COPY         3u
+#define SVGA_CMD_DEFINE_CURSOR     19u
+#define SVGA_CMD_DISPLAY_CURSOR    20u
+#define SVGA_CMD_DEFINE_ALPHA_CURSOR 22u
+#define SVGA_CMD_DEFINE_SCREEN     34u
+#define SVGA_CMD_DESTROY_SCREEN    35u
+#define SVGA_CMD_DEFINE_GMRFB      36u
+#define SVGA_CMD_BLIT_GMRFB_TO_SCREEN 37u
+
+#define SVGA_FIFO_MIN              0u
+#define SVGA_FIFO_MAX              1u
+#define SVGA_FIFO_NEXT_CMD         2u
+#define SVGA_FIFO_STOP             3u
+#define SVGA_FIFO_CAPABILITIES     4u
+#define SVGA_FIFO_FLAGS            5u
+#define SVGA_FIFO_FENCE            6u
+#define SVGA_FIFO_3D_HWVERSION     7u
+#define SVGA_FIFO_PITCHLOCK        8u
+#define SVGA_FIFO_CURSOR_ON        9u
+#define SVGA_FIFO_CURSOR_X         10u
+#define SVGA_FIFO_CURSOR_Y         11u
+#define SVGA_FIFO_CURSOR_COUNT     12u
+#define SVGA_FIFO_CURSOR_LAST_UPDATED 13u
+#define SVGA_FIFO_RESERVED         14u
+#define SVGA_FIFO_CURSOR_SCREEN_ID 15u
+#define SVGA_FIFO_3D_CAPS          32u
+#define SVGA_FIFO_3D_CAPS_LAST     (SVGA_FIFO_3D_CAPS + 255u)
+#define SVGA_FIFO_GUEST_3D_HWVERSION (SVGA_FIFO_3D_CAPS_LAST + 1u)
+#define SVGA_FIFO_FENCE_GOAL       (SVGA_FIFO_3D_CAPS_LAST + 2u)
+#define SVGA_FIFO_BUSY             (SVGA_FIFO_3D_CAPS_LAST + 3u)
+#define SVGA_FIFO_NUM_LEGACY_REGS  4u
+#define SVGA_FIFO_NUM_REGS_FALLBACK (SVGA_FIFO_BUSY + 3u)
+
+#define SVGA_CAP_CURSOR            0x00000020u
+#define SVGA_CAP_CURSOR_BYPASS     0x00000040u
+#define SVGA_CAP_CURSOR_BYPASS_2   0x00000080u
+#define SVGA_CAP_ALPHA_CURSOR      0x00000200u
+#define SVGA_CAP_EXTENDED_FIFO     0x00008000u
+#define SVGA_CAP_MULTIMON          0x00010000u
+#define SVGA_CAP_PITCHLOCK         0x00020000u
+#define SVGA_CAP_DISPLAY_TOPOLOGY  0x00080000u
+#define SVGA_CAP_GMR               0x00100000u
+#define SVGA_CAP_GMR2              0x00400000u
+#define SVGA_CAP_SCREEN_OBJECT_2   0x00800000u
+
+#define SVGA_CURSOR_ON_HIDE        0u
+#define SVGA_CURSOR_ON_SHOW        1u
+
+#define SVGA_FIFO_CAP_CURSOR_BYPASS_3 0x00000010u
+#define SVGA_FIFO_CAP_SCREEN_OBJECT   0x00000080u
+#define SVGA_FIFO_CAP_SCREEN_OBJECT_2 0x00000200u
+
+#define SVGA_GMR_FRAMEBUFFER      0xFFFFFFFEu
+#define SVGA_SCREEN_MUST_BE_SET   0x00000001u
+#define SVGA_SCREEN_IS_PRIMARY    0x00000002u
+#define SVGA_SCREEN_OBJECT_ID_PRIMARY 0u
+#define SVGA_GMRFB_FORMAT_32BPP_24DEPTH ((32u) | (24u << 8))
+
+/*
+ * The production path is legacy GFB + UPDATE.  Screen objects are kept behind
+ * an opt-in switch until the SO/GMRFB path is independently validated on real
+ * VMware hosts.
+ */
+#ifndef VMWSVGA_ENABLE_SCREEN_OBJECTS
+#define VMWSVGA_ENABLE_SCREEN_OBJECTS 0
+#endif
+
+#define VMWSVGA_MAX_WAIT_ITERS     1000000u
+#define VMWSVGA_CURSOR_W           DISPLAY_DEFAULT_CURSOR_W
+#define VMWSVGA_CURSOR_H           DISPLAY_DEFAULT_CURSOR_H
+
+#define VMWSVGA_CAPS_MINIMAL       (DISPLAY_CAP_FRAMEBUFFER | DISPLAY_CAP_SOFTWARE_CURSOR | DISPLAY_CAP_PRESENT_SYNC)
+#define VMWSVGA_CAPS_HW_CURSOR     (DISPLAY_CAP_FRAMEBUFFER | DISPLAY_CAP_HARDWARE_CURSOR | DISPLAY_CAP_PRESENT_SYNC)
+
+typedef struct VMWSVGA_DEVICE {
+    uint32_t Magic;
+
+    DEVICE_OBJECT* Fdo;
+    DEVICE_OBJECT* Pdo;
+    DEVICE_OBJECT* LowerDevice;
+
+    PCI_DEVICE_INFO PciInfo;
+    PCI_BAR IoBar;
+    PCI_BAR FramebufferBar;
+    PCI_BAR FifoBar;
+
+    uint16_t IoBase;
+    volatile uint8_t* FramebufferMapping;
+    volatile uint8_t* Framebuffer;
+    volatile uint32_t* Fifo;
+    uint64_t FramebufferBytes;
+    uint32_t FramebufferOffset;
+    uint64_t FifoBytes;
+    uint32_t FifoDeviceBytes;
+
+    uint32_t DeviceId;
+    uint32_t Capabilities;
+    uint32_t Width;
+    uint32_t Height;
+    uint32_t Stride;
+    uint32_t BytesPerLine;
+    uint32_t BitsPerPixel;
+
+    uint32_t* Backbuffer;
+    size_t BackbufferBytes;
+
+    uint32_t FifoRegCount;
+    uint32_t FifoCaps;
+
+    bool UseScreenObject;
+    uint32_t ScreenId;
+    uint32_t ScreenSourceOffset;
+    uint32_t ScreenSourceBytes;
+    uint32_t ScreenBackingOffset;
+    uint32_t ScreenBackingBytes;
+
+    bool FifoReady;
+    bool HardwareCursor;
+    bool AlphaCursor;
+    bool CursorBypass3;
+    bool CursorImageDefined;
+    bool CursorVisible;
+    uint32_t* CursorImageArgb;
+    size_t CursorImageBytes;
+    int CursorImageWidth;
+    int CursorImageHeight;
+    int CursorHotX;
+    int CursorHotY;
+    bool Started;
+    bool Removed;
+    bool SurpriseRemoved;
+
+    int CursorX;
+    int CursorY;
+    int CursorDrawX;
+    int CursorDrawY;
+    bool CursorDrawn;
+
+    DISPLAY_STATS Stats;
+    DISPLAY_DEVICE DisplayDevice;
+} VMWSVGA_DEVICE;
+
+extern const HAL_API* gVmwSvgaHal;
+
+KSTATUS VmwSvgaAddDevice(DRIVER_OBJECT* driver, DEVICE_OBJECT* physicalDeviceObject);
+KSTATUS VmwSvgaDispatchPnp(DEVICE_OBJECT* device, IRP* irp);