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introduce a stable NTL_DDK driver ABI to replace direct HAL_API and kernel-header access in drivers, add code/kernel/io_ddk.c and code/public/ntlite/ddk/ headers, change DriverEntry to take (const NTL_DDK*, NTL_DRIVER_INIT*), update kmain to build the DDK once via IoInitializeDdk/IoGetDdk and hand it to both boot and runtime drivers, downgrade code/public/ntlite/ddi/io_driver.h to a legacy I/O model header pulling from ntlite/ddk instead of kernel internals, move code/third_party/lwip into code/drivers/net/lwip/third_party, fix up lwip_sources.txt and build.c include paths to match, split build.c's single CFLAGS macro into COMMON/KERNEL/USER/BOOT/DRIVER cflags.

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maksw committed 2026-07-01 23:19:11 +02:00
1 parent 08329516ba
commit 485a6bbfe7
385 files changed
+1822 -1079
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code/drivers/bus/pci/pci.c
+28 -31
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@@ -8,17 +8,12 @@
#include <string.h>
#include <common/printf.h>
#include <ntlite/ddi/hal_api.h>
#include <ntlite/ddk/ddk.h>
#include <ntlite/ddi/io_driver.h>
#include <kernel/mm_virt.h>
#include <kernel/ke_debug.h>
#include <kernel/ke_irp.h>
#include <kernel/ke_irq.h>
#include <kernel/hal/hal_apic.h>
int _fltused; // MSVC floating-point helper anchor required by printf.obj
static const HAL_API* gHal;
static const NTL_DDK* gDdk;
static DRIVER_OBJECT gPciDriver;
static uint32_t gPciDeviceCount;
@@ -38,7 +33,7 @@ static uint64_t PciAlignUp64(uint64_t value, uint64_t alignment) {
// Implements the default Mmio Flags operation.
static uint64_t PciDefaultMmioFlags(void) {
return PAGE_PRESENT | PAGE_WRITE | PAGE_WRITETHROUGH | PAGE_NOCACHE | PAGE_NX;
return NTL_DDK_PAGE_PRESENT | NTL_DDK_PAGE_WRITE | NTL_DDK_PAGE_WRITETHROUGH | NTL_DDK_PAGE_NOCACHE | NTL_DDK_PAGE_NX;
}
// Creates mmio Va.
@@ -46,8 +41,8 @@ static KSTATUS PciAllocateMmioVa(uint64_t length, uintptr_t* outVa) {
if (!outVa || !length)
return NTLSTATUS_INVALID_PARAMETER;
uint64_t alignedLength = PciAlignUp64(length, PAGE_SIZE);
uintptr_t va = (uintptr_t)PciAlignUp64((uint64_t)gPciMmioNext, PAGE_SIZE);
uint64_t alignedLength = PciAlignUp64(length, NTL_DDK_PAGE_SIZE);
uintptr_t va = (uintptr_t)PciAlignUp64((uint64_t)gPciMmioNext, NTL_DDK_PAGE_SIZE);
if (va < PCI_MMIO_VA_BASE || va >= PCI_MMIO_VA_LIMIT)
return NTLSTATUS_NO_MEMORY;
if (alignedLength > (uint64_t)(PCI_MMIO_VA_LIMIT - va))
@@ -70,14 +65,14 @@ static bool PciIsPdo(DEVICE_OBJECT* pdo, PCI_PDO_EXTENSION** outExt) {
// Implements the raw Read32 operation.
static uint32_t PciRawRead32(uint8_t bus, uint8_t dev, uint8_t fn, uint16_t offset) {
if (!gHal || offset > 0xFCu) return 0xFFFFFFFFu;
return gHal->Pci.Read32(0, bus, dev, fn, offset & 0xFCu);
if (!gDdk || !gDdk->Platform || !gDdk->Platform->PciRead32 || offset > 0xFCu) return 0xFFFFFFFFu;
return gDdk->Platform->PciRead32(0, bus, dev, fn, offset & 0xFCu);
}
// Implements the raw Write32 operation.
static void PciRawWrite32(uint8_t bus, uint8_t dev, uint8_t fn, uint16_t offset, uint32_t value) {
if (!gHal || offset > 0xFCu) return;
gHal->Pci.Write32(0, bus, dev, fn, offset & 0xFCu, value);
if (!gDdk || !gDdk->Platform || !gDdk->Platform->PciWrite32 || offset > 0xFCu) return;
gDdk->Platform->PciWrite32(0, bus, dev, fn, offset & 0xFCu, value);
}
// Implements the raw Read8 operation.
@@ -391,7 +386,7 @@ static KSTATUS PciCreatePdo(uint8_t bus, uint8_t dev, uint8_t fn) {
}
gPciDeviceCount++;
DbgPrint("pci: %v ven=%04x dev=%04x class=%02x%02x%02x irq=%u\n",
gDdk->Debug->Print("pci: %v ven=%04x dev=%04x class=%02x%02x%02x irq=%u\n",
pdo->Name,
info.VendorId,
info.DeviceId,
@@ -416,7 +411,7 @@ static void PciEnumerateBus(void) {
for (uint8_t fn = 0; fn < fnLimit; fn++) {
KSTATUS st = PciCreatePdo((uint8_t)bus, (uint8_t)dev, fn);
if (!KSUCCESS(st) && st != NTLSTATUS_NOT_FOUND) {
DbgPrint("pci: failed to create PDO for %02x:%02x.%u st=0x%x\n",
gDdk->Debug->Print("pci: failed to create PDO for %02x:%02x.%u st=0x%x\n",
bus, dev, fn, st);
}
}
@@ -529,19 +524,19 @@ __declspec(dllexport) KSTATUS PciMapBar(DEVICE_OBJECT* pdo, uint8_t index, uint6
return NTLSTATUS_INVALID_PARAMETER;
uint64_t flags = pageFlags ? pageFlags : PciDefaultMmioFlags();
flags |= PAGE_PRESENT;
flags |= NTL_DDK_PAGE_PRESENT;
uint64_t physBase = bar.Base & ~(uint64_t)(PAGE_SIZE - 1u);
uint64_t physBase = bar.Base & ~(uint64_t)(NTL_DDK_PAGE_SIZE - 1u);
uint64_t physOffset = bar.Base - physBase;
uint64_t mapLength = PciAlignUp64(physOffset + bar.Length, PAGE_SIZE);
uint64_t mapLength = PciAlignUp64(physOffset + bar.Length, NTL_DDK_PAGE_SIZE);
uintptr_t virtBase = 0;
st = PciAllocateMmioVa(mapLength, &virtBase);
if (!KSUCCESS(st))
return st;
for (uint64_t off = 0; off < mapLength; off += PAGE_SIZE) {
st = MmPteMapPage(virtBase + (uintptr_t)off, physBase + off, flags, MmPteMapFailIfPresent);
for (uint64_t off = 0; off < mapLength; off += NTL_DDK_PAGE_SIZE) {
st = gDdk->Memory->MapPage(virtBase + (uintptr_t)off, physBase + off, flags, NtlDdkMapFailIfPresent);
if (!KSUCCESS(st))
return st;
}
@@ -616,10 +611,11 @@ __declspec(dllexport) KSTATUS PciEnableMsi(DEVICE_OBJECT* pdo, uint8_t irqSlot)
if (!cap)
return NTLSTATUS_NOT_SUPPORTED;
uint32_t bspLapic = HalGetBspLapicId();
if (!HalApicUsingX2Apic() && bspLapic >= 256u)
uint32_t bspLapic = gDdk->Platform->GetBspLapicId();
uint8_t x2Apic = gDdk->Platform->IsX2ApicEnabled();
if (!x2Apic && bspLapic >= 256u)
return NTLSTATUS_NOT_SUPPORTED;
if (HalApicUsingX2Apic() && bspLapic >= 256u) {
if (x2Apic && bspLapic >= 256u) {
// Extended x2APIC MSI destinations need interrupt-remapping awareness.
return NTLSTATUS_NOT_SUPPORTED;
}
@@ -655,7 +651,7 @@ __declspec(dllexport) KSTATUS PciEnableMsi(DEVICE_OBJECT* pdo, uint8_t irqSlot)
cmd |= PCI_COMMAND_INTX_DISABLE;
PciRawWrite16(bus, dev, fn, PCI_REG_COMMAND_STATUS, cmd);
DbgPrint("pci: MSI enabled %02x:%02x.%u cap=0x%02x vector=0x%02x irqslot=%u dest=%u %s\n",
gDdk->Debug->Print("pci: MSI enabled %02x:%02x.%u cap=0x%02x vector=0x%02x irqslot=%u dest=%u %s\n",
bus, dev, fn, cap, vector, irqSlot, bspLapic, is64 ? "64-bit" : "32-bit");
return NTLSTATUS_SUCCESS;
}
@@ -670,7 +666,7 @@ __declspec(dllexport) KSTATUS PciEnableMsiAuto(DEVICE_OBJECT* pdo, uint8_t* outI
return NTLSTATUS_NOT_SUPPORTED;
uint8_t irq = 0xFFu;
KSTATUS st = KeIrqAllocateMsiVector(&irq);
KSTATUS st = gDdk->Interrupt->AllocateMsiVector(&irq);
if (!KSUCCESS(st))
return st;
@@ -683,9 +679,10 @@ __declspec(dllexport) KSTATUS PciEnableMsiAuto(DEVICE_OBJECT* pdo, uint8_t* outI
}
// Implements the driver Entry operation.
KSTATUS DriverEntry(const HAL_API* hal) {
if (!hal) return NTLSTATUS_INVALID_PARAMETER;
gHal = hal;
KSTATUS DriverEntry(const NTL_DDK* ddk, NTL_DRIVER_INIT* init) {
(void)init;
if (!ddk || !ddk->Debug || !ddk->Interrupt || !ddk->Memory || !ddk->Platform) return NTLSTATUS_INVALID_PARAMETER;
gDdk = ddk;
gPciDeviceCount = 0;
IoInitializeDriverObject(&gPciDriver, SYS_SV_LITERAL("pci"));
@@ -694,8 +691,8 @@ KSTATUS DriverEntry(const HAL_API* hal) {
KSTATUS st = IoRegisterDriverObject(&gPciDriver);
if (!KSUCCESS(st)) return st;
DbgPrint("pci: DriverEntry ABI=%u\n", PciDriverAbiVersion());
gDdk->Debug->Print("pci: DriverEntry ABI=%u\n", PciDriverAbiVersion());
PciEnumerateBus();
DbgPrint("pci: enumeration complete, devices=%u\n", gPciDeviceCount);
gDdk->Debug->Print("pci: enumeration complete, devices=%u\n", gPciDeviceCount);
return NTLSTATUS_SUCCESS;
}